mscLpDS3CBitCbitSevErroredSec 1.3.6.1.4.1.562.36.2.1.12.5.3.11.1.4

This attribute indicates the total number of C-Bit Parity Severely Errored Seconds (CSES). A CSES is declared for second intervals containing more than 44 CCVs or one or more SEF or AIS defects. The occurrence of CSES in a one second interval causes the inhibition of CCV counting during that second interval. CSES counting is also inhibited for second intervals where C-Bit Unavailable Seconds (CUAS) are counted.

Informations

Access Type
readonly

Parent

1.3.6.1.4.1.562.36.2.1.12.5.3.11.1 mscLpDS3CBitStatsEntry