Read/write bit that allows software Tx rate control. Writing
1 selects full speed Tx operation. This bit is OR d with the
hard RS(1) pin value.See Table 3.11 for timing requirements.
Default at power up is logic zero/low. If Soft RS(1) is not
implemented, the transceiver ignores the value of this bit.
Note: Specific transceiver behaviors of this bit are
identified in Table 3.6a and referenced documents. See
Table 3.17, byte 110, bit 3 for Soft RS(0) Select.