wsmPortSerialTxClockPol 1.3.6.1.4.1.800.2.7.1.1.1.6

The Transmit clock polarity. It is inverted or not inverted. For interfaces that do not support this, the value will be stored but ignored.

Informations

Access Type
readwrite non-inverted(1), inverted(2)

Parent

1.3.6.1.4.1.800.2.7.1.1.1 wsmPortEntry