The Upstream Input power level at the CMTS interface.
This is the expected power level and is different from the
actual power received. If not configured the default value
is 0 dBmV and is also the optimum setting power level for
the upstream. For FPGA line cards, the valid range
is <-10 to 10> dBmV and for ASIC Line cards, it is
<-10 to 25> dBmV.